We write software for embedded systems. With an electronics engineering background, hardware was obviously no problem, however, the amount of effort required in any non-trivial design has migrated most of the design effort to large teams with low costs — invariably to India or China. We are still prepared to design at the FPGA level, but have not done any schematic capture, layout and pre-production runs for a few years. To see some of the prior hardware efforts, navigate around this site. Our own hardware design is for internal visibility or instrumentation of a target, which is unlikely to become commercially available due to the specialised nature of debugging.
We can work with your teams to integrate debug infrastructure for new targets. We have used ARM for the past fifteen or so years, but will be moving to RISC-V during 2018, so if this is of interest, we will share projects once the intellectual property ownership issues have been agreed. Where possible, we use open source or prior art which can be referenced to avoid litigation.
The RISC-V core is available for various FPGA evaluation boards. We started with a low cost Arty board from Digilent Inc for US$99. The initial Sifive E31 Core FPGA Bitstream was downloaded and printed the Hello World prompt, and that is it without a dedicated JTAG probe to download your compiled C code.
The toolchains took some effort in configuring, so for the multicore stuff, we will wait for more momentum and see which high-end board gets the best support. In the beginning of 2018, we reinstalled Ubuntu Linux on an old quad core X86-64 system, which is the same operating system as the examples to configure the development on the RISC-V website.
There was a low-cost ($59) 32-bit HiFive Freedom Everywhere board at SiFive.com which used their first silicon chips. The RTL is open-source, which will certainly open up new markets. We are interested in the debug blocks, and will likely use the FPGA based boards.
The E310 chips in the above board have very limited RAM, so probably not a good target to learn the architecture or commit too much time to. The source code is in Chisel on Scala, all with the associated learning curve. We downloaded the files, compiled the examples, and then decided that it was not what we intended doing for debug. We are interested in System Verilog with human readable code, rather than as machine generated intermediate code that is difficult to troubleshoot.
Microsemi RISC-V ecosystem has a core, but it appears to be generated from the Rocket code, and without purchasing the boards, we could not see what was involved or what is supplied. There is a companion FPGA board for the Sifive HiFive Unleashed board, but the combination is US$3000, and still early days for being able to modify any of the design files.
Our next steps are to take one of the available Verilog cores and put it into a fairly large Xilinx FPGA and try to instrument the core for debug. We will describe our wishlist later, as this is all done in free time, which is limited. There are several cores, but the most interesting to us is the Parallel Ultra Low Power site by ETH Zurich and the University of Bologna. Others are from RoaLogic, and links taken from RISC-V.org.
Our embedded software is almost exclusively written in C. ARM Cross-compilers run on both Apple OSX and Microsoft operating systems. Besides vendor supported toolchains, we ensured that the software projects worked with the multi-platform Rowley Associates CrossWorks toolchain, as they have excellent pricing, licensing policies and support. Customers prefer toolchains for nothing, so we have migrated to the free Atmel Studio for their micros, and Simplicity Studio from Silicon Laboratories. Atollic have a free version of their toolchain, but when we first started with the Atmel M7 Cortex core, they did not support it yet. Some Silicon Laboratory work (Bluetooth later), gave us an opportunity to test their Simplicity Studio with a GCC toolchain. We used an old Giant Gecko evaluation board to test the work flow, and it is multi-platform. In our case, we prefer the Mac, and it ran well. Silicon Laboratories recently acquired Micrium, so their real-time kernel is available preconfigured for several SiLabs evaluation boards, plus for the base, source code is supplied for those interested in a commercially supported kernel.
Atmel's Studio framework software is based on GCC with a decent front-end. This runs on a Windows PC and can be downloaded for free. For real-time work, there are links from within the software to download a version of FreeRTOS that has been ported to several Atmel boards with the single task LED flashing demo.
The RISC-V work will be on whatever platform the Xilinx FPGA tools require. The software for the core will most likely run one of the BSD Unix variants or Linux (So far we have installed Ubuntu Linux). We have decades of Unix/ Linux experience, so will follow the pioneers and select the same desktop. The host is a multicore 64-bit x86 PC that died after an upgrade to Windows 10, but is good enough for cross-compiling kernels and root file systems. Will we run native on the target? Most likely not due to the low level of tracing and debug that we would like to run. These tools tend to crash a system or require constant changes, and the target will be under 1GHz anyway.
A few years back, we ventured into mechanical design. We purchased SolidWorks mechanical CAD software to use for fixtures and enclosures, but ended up designing wood furniture.
We did a bit of MIG welding, and limit the work to prototypes, as we are not coded welders. In February, we purchased an ESAB TIG welding machine for thin sheet metal work (also capable of over 200 Amps if needed), as we are interested in machine building prototypes.
Up to now, our scope of supply included schematics, board layouts and source code without restrictions on derivative designs, volumes or royalties. Future scope depends on the client, and needs to be negotiated before any work begins.
Our sales are generally intellectual property that can be sent via email. Clients are responsible for any local compliance as we cannot accept incidental or consequential damages. (Our European—, American— and Asian suppliers waive consequential damages. Many do not transfer warranties to their clients' customers, which is why we encourage clients to purchase initial evaluation boards directly from the manufacturers.)
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